Description

File(s):

Reference:

Nordic nRF905 datasheet

Data Structures
struct	px_nrf905_cfg_reg_t
	NRF905 Configuration register map. More...

Macros
#define	PX_NRF905_MAX_SPI_CLOCK_HZ 10000000ul
	Maximum SPI Clock rate. More...

#define	PX_NRF905_SPI_MODE PX_SPI_MODE0
	SPI Clock / Data phase. More...

#define	PX_NRF905_SPI_DATA_ORDER PX_SPI_DATA_ORDER_MSB
	SPI Data order. More...

#define	PX_NRF905_MIN_PAYLOAD_SIZE 1
	Size of each data block. More...

RF - Configuration register settings
#define	PX_NRF905_HFREQ_PLL_433MHZ 0
	433 MHz More...

#define	PX_NRF905_HFREQ_PLL_868_915MHZ 1
	868 / 915 MHz More...

#define	PX_NRF905_PA_PWR_M10DBM 0
	-10 dBm More...

#define	PX_NRF905_PA_PWR_M2DBM 1
	-2 dBm More...

#define	PX_NRF905_PA_PWR_P6DBM 2
	+6 dBm More...

#define	PX_NRF905_PA_PWR_P10DBM 3
	+10 dBm More...

#define	PX_NRF905_RX_RED_PWR_NORMAL 0
	Normal operation. More...

#define	PX_NRF905_RX_RED_PWR_ACTIVE 1
	Reduced power. More...

#define	PX_NRF905_AUTO_RETRAN_NO 0
	No retransmission. More...

#define	PX_NRF905_AUTO_RETRAN_YES 1
	Retransmission of data packet. More...

#define	PX_NRF905_UP_CLK_FREQ_4MHZ 0
	4 MHz More...

#define	PX_NRF905_UP_CLK_FREQ_2MHZ 1
	2 MHz More...

#define	PX_NRF905_UP_CLK_FREQ_1MHZ 2
	1 MHz More...

#define	PX_NRF905_UP_CLK_FREQ_500KHZ 3
	500 kHz More...

#define	PX_NRF905_UP_CLK_EN_NO 0
	No external clock signal available. More...

#define	PX_NRF905_UP_CLK_EN_YES 1
	External clock signal enabled. More...

#define	PX_NRF905_XOF_4MHZ 0
	4 MHz More...

#define	PX_NRF905_XOF_8MHZ 1
	8 MHz More...

#define	PX_NRF905_XOF_12MHZ 2
	12 MHz More...

#define	PX_NRF905_XOF_16MHZ 3
	16 MHz More...

#define	PX_NRF905_XOF_20MHZ 4
	20 MHz More...

#define	PX_NRF905_CRC_EN_NO 0
	Disable CRC check. More...

#define	PX_NRF905_CRC_EN_YES 1
	Enable CRC check. More...

#define	PX_NRF905_CRC_MODE_8BITS 0
	8-bit CRC check More...

#define	PX_NRF905_CRC_MODE_16BITS 1
	16-bit CRC check More...

Data Structure Documentation

◆ px_nrf905_cfg_reg_t

struct px_nrf905_cfg_reg_t

NRF905 Configuration register map.

Definition at line 95 of file px_nrf905.h.

Data Fields
uint8_t	ch_no_7_0	Set center frequency (together with HFREQ_PLL)
uint8_t	ch_no_8: 1	Set center frequency (together with HFREQ_PLL)
uint8_t	hfreq_pll: 1	Set PLL in 433 or 868/915MHz mode.
uint8_t	pa_pwr: 2	Output power.
uint8_t	rx_red_pwr: 1	Reduce current in RX mode by 1.6mA (sensitivity also is reduced)
uint8_t	auto_retran: 1	Retransmit contents in TX register if TRX_CE and TXEN are high.
uint8_t	reserved1: 2
uint8_t	rx_afw: 3	RX-address width.
uint8_t	reserved2: 1
uint8_t	tx_afw: 3	TX-address width.
uint8_t	reserved3: 1
uint8_t	rx_pw: 6	RX-payload width.
uint8_t	reserved4: 2
uint8_t	tx_pw: 6	TX-payload width.
uint8_t	reserved5: 2
uint8_t	rx_adr_0	RX address identity byte 0.
uint8_t	rx_adr_1	RX address identity byte 1.
uint8_t	rx_adr_2	RX address identity byte 2.
uint8_t	rx_adr_3	RX address identity byte 3.
uint8_t	up_clk_freq: 2	Output clock frequency.
uint8_t	up_clk_en: 1	Output clock enable.
uint8_t	xof: 3	Crystal oscillator frequency.
uint8_t	px_crc_en: 1	CRC � check enable.
uint8_t	px_crc_mode: 1	CRC � mode.

Macro Definition Documentation

◆ PX_NRF905_MAX_SPI_CLOCK_HZ

#define PX_NRF905_MAX_SPI_CLOCK_HZ 10000000ul

Maximum SPI Clock rate.

Definition at line 46 of file px_nrf905.h.

◆ PX_NRF905_SPI_MODE

#define PX_NRF905_SPI_MODE PX_SPI_MODE0

SPI Clock / Data phase.

Definition at line 48 of file px_nrf905.h.

◆ PX_NRF905_SPI_DATA_ORDER

#define PX_NRF905_SPI_DATA_ORDER PX_SPI_DATA_ORDER_MSB

SPI Data order.

Definition at line 50 of file px_nrf905.h.

◆ PX_NRF905_MIN_PAYLOAD_SIZE

#define PX_NRF905_MIN_PAYLOAD_SIZE 1

Size of each data block.

Definition at line 53 of file px_nrf905.h.

◆ PX_NRF905_HFREQ_PLL_433MHZ

#define PX_NRF905_HFREQ_PLL_433MHZ 0

433 MHz

Definition at line 58 of file px_nrf905.h.

◆ PX_NRF905_HFREQ_PLL_868_915MHZ

#define PX_NRF905_HFREQ_PLL_868_915MHZ 1

868 / 915 MHz

Definition at line 59 of file px_nrf905.h.

◆ PX_NRF905_PA_PWR_M10DBM

#define PX_NRF905_PA_PWR_M10DBM 0

-10 dBm

Definition at line 61 of file px_nrf905.h.

◆ PX_NRF905_PA_PWR_M2DBM

#define PX_NRF905_PA_PWR_M2DBM 1

-2 dBm

Definition at line 62 of file px_nrf905.h.

◆ PX_NRF905_PA_PWR_P6DBM

#define PX_NRF905_PA_PWR_P6DBM 2

+6 dBm

Definition at line 63 of file px_nrf905.h.

◆ PX_NRF905_PA_PWR_P10DBM

#define PX_NRF905_PA_PWR_P10DBM 3

+10 dBm

Definition at line 64 of file px_nrf905.h.

◆ PX_NRF905_RX_RED_PWR_NORMAL

#define PX_NRF905_RX_RED_PWR_NORMAL 0

Normal operation.

Definition at line 66 of file px_nrf905.h.

◆ PX_NRF905_RX_RED_PWR_ACTIVE

#define PX_NRF905_RX_RED_PWR_ACTIVE 1

Reduced power.

Definition at line 67 of file px_nrf905.h.

◆ PX_NRF905_AUTO_RETRAN_NO

#define PX_NRF905_AUTO_RETRAN_NO 0

No retransmission.

Definition at line 69 of file px_nrf905.h.

◆ PX_NRF905_AUTO_RETRAN_YES

#define PX_NRF905_AUTO_RETRAN_YES 1

Retransmission of data packet.

Definition at line 70 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_FREQ_4MHZ

#define PX_NRF905_UP_CLK_FREQ_4MHZ 0

4 MHz

Definition at line 72 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_FREQ_2MHZ

#define PX_NRF905_UP_CLK_FREQ_2MHZ 1

2 MHz

Definition at line 73 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_FREQ_1MHZ

#define PX_NRF905_UP_CLK_FREQ_1MHZ 2

1 MHz

Definition at line 74 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_FREQ_500KHZ

#define PX_NRF905_UP_CLK_FREQ_500KHZ 3

500 kHz

Definition at line 75 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_EN_NO

#define PX_NRF905_UP_CLK_EN_NO 0

No external clock signal available.

Definition at line 77 of file px_nrf905.h.

◆ PX_NRF905_UP_CLK_EN_YES

#define PX_NRF905_UP_CLK_EN_YES 1

External clock signal enabled.

Definition at line 78 of file px_nrf905.h.

◆ PX_NRF905_XOF_4MHZ

#define PX_NRF905_XOF_4MHZ 0

4 MHz

Definition at line 80 of file px_nrf905.h.

◆ PX_NRF905_XOF_8MHZ

#define PX_NRF905_XOF_8MHZ 1

8 MHz

Definition at line 81 of file px_nrf905.h.

◆ PX_NRF905_XOF_12MHZ

#define PX_NRF905_XOF_12MHZ 2

12 MHz

Definition at line 82 of file px_nrf905.h.

◆ PX_NRF905_XOF_16MHZ

#define PX_NRF905_XOF_16MHZ 3

16 MHz

Definition at line 83 of file px_nrf905.h.

◆ PX_NRF905_XOF_20MHZ

#define PX_NRF905_XOF_20MHZ 4

20 MHz

Definition at line 84 of file px_nrf905.h.

◆ PX_NRF905_CRC_EN_NO

#define PX_NRF905_CRC_EN_NO 0

Disable CRC check.

Definition at line 86 of file px_nrf905.h.

◆ PX_NRF905_CRC_EN_YES

#define PX_NRF905_CRC_EN_YES 1

Enable CRC check.

Definition at line 87 of file px_nrf905.h.

◆ PX_NRF905_CRC_MODE_8BITS

#define PX_NRF905_CRC_MODE_8BITS 0

8-bit CRC check

Definition at line 89 of file px_nrf905.h.

◆ PX_NRF905_CRC_MODE_16BITS

#define PX_NRF905_CRC_MODE_16BITS 1

16-bit CRC check

Definition at line 90 of file px_nrf905.h.