px-fwlib
0.10.0
Cross-platform embedded library and documentation for 8/16/32-bit microcontrollers
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1.9.2
px_spi_cfg_template.h
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#ifndef __PX_SPI_CFG_H__
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#define __PX_SPI_CFG_H__
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/* =============================================================================
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____ ___ ____ ___ _ _ ___ __ __ ___ __ __ TM
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| _ \ |_ _| / ___| / _ \ | \ | | / _ \ | \/ | |_ _| \ \/ /
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| |_) | | | | | | | | | | \| | | | | | | |\/| | | | \ /
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| __/ | | | |___ | |_| | | |\ | | |_| | | | | | | | / \
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|_| |___| \____| \___/ |_| \_| \___/ |_| |_| |___| /_/\_\
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Copyright (c) 2014 Pieter Conradie <https://piconomix.com>
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License: MIT
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https://github.com/piconomix/px-fwlib/blob/master/LICENSE.md
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Title: px_spi_cfg.h : SPI Peripheral Driver configuration
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Author(s): Pieter Conradie
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Creation Date: 2014-01-15
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============================================================================= */
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/**
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* @addtogroup AVR_SPI
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*
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* @{
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*/
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/* _____STANDARD INCLUDES____________________________________________________ */
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/* _____PROJECT INCLUDES_____________________________________________________ */
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#include "px_defs.h"
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#include "px_board.h"
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/* _____DEFINITIONS__________________________________________________________ */
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/// Enable/disable support for SPI0 peripheral
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#define PX_SPI_CFG_SPI0_EN 1
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/// Default value for SPI Control Register used in px_spi_open().
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#define PX_SPI_CFG_SPCR \
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((0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (0 << SPR1) | (0 << SPR0))
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/// Default value for "Use double clock rate" used in px_spi_open().
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#define PX_SPI_CFG_USE_SPI2X 0
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/// Specify default baud rate
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#define PX_SPI_CFG_DEFAULT_BAUD PX_SPI_BAUD_CLK_DIV_2
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/// Specify default SPI mode (clock phase and polarity)
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#define PX_SPI_CFG_DEFAULT_MODE PX_SPI_MODE0
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/// Specify default SPI data order
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#define PX_SPI_CFG_DEFAULT_DATA_ORDER PX_SPI_DATA_ORDER_MSB
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/**
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* Map PX_SPI_CFG_CS_LO() macro to board_spi_cs_lo() function.
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*
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* A manual Chip Select function must be implemented, e.g.
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*
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* void board_spi_cs_lo(uint8_t cs_id)
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* {
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* switch(cs_id)
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* {
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* case BOARD_SPI_CS:
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* PX_GPIO_PIN_SET_LO(PX_GPIO_SPI_CS);
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* break;
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*
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* default:
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* break;
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* }
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* }
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*/
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#define PX_SPI_CFG_CS_LO(cs_id) px_board_spi_cs_lo(cs_id)
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/**
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* Map PX_SPI_CFG_CS_HI() macro to board_spi_cs_hi() function.
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*
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* A manual Chip Select function must be implemented, e.g.
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*
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* void board_spi_cs_hi(uint8_t cs_id)
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* {
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* switch(cs_id)
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* {
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* case BOARD_SPI_CS:
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* PX_GPIO_OUT_SET_HI(PX_GPIO_SPI_CS);
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* break;
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*
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* default:
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* break;
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* }
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* }
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*
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*/
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#define PX_SPI_CFG_CS_HI(cs_id) px_board_spi_cs_hi(cs_id)
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/// @}
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#endif